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EN0-001 Exam Dumps - ARM Accredited Engineer

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Question # 4

Which TWO of the following accurately describe constraints on the location of the Tightly Coupled Memory (TCM) regions in a Cortex-R4 processor? (Choose two)

A.

TCM Region A (ATCM) must be at a lower memory address than TCM Region B (BTCM)

B.

TCM Region A can only be located at address 0x0

C.

Both TCM regions must be placed at addresses which are aligned to their size

D.

The two TCM regions may not overlap

E.

TCM Region B (BTCM) must be located immediately above TCM Region A (ATCM)

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Question # 5

The Cortex-A9 processor implements a feature called "small loop mode" which reduces power consumption when executing small loops by turning off instruction cache accesses. Which of the following statements describes a condition that must be satisfied for this mode to be enabled?

A.

The loop must fit into two cache lines

B.

The loop must only contain forward branches

C.

Only integer arithmetic can be used

D.

All variables must be held in registers

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Question # 6

When an interrupt service routine reads the Generic Interrupt Controller (GIC) Interrupt Acknowledge Register, what state transition occurs for that interrupt ID?

A.

Inactive to Active

B.

Inactive to Pending

C.

Active to Inactive

D.

Pending to Active

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Question # 7

An undefined instruction will cause an Undefined Instruction exception to be taken when:

A.

It is fetched.

B.

It is decoded.

C.

It is executed.

D.

It writes back its results.

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Question # 8

Processors which implement the ARMv7-A architecture can be configured to allow unaligned memory access. Unaligned accesses have a number of advantages, disadvantages, and limitations.

Which TWO of the following statements are true? (Choose two)

A.

Unaligned accesses may take more cycles to execute than aligned accesses

B.

Unaligned loads and stores are necessary for accessing fields in packed structures

C.

A program compiled using unaligned accesses can be safely executed on all ARMv7-A devices

D.

If the relevant control register setting is enabled all loads and stores can function from unaligned addresses

E.

Unaligned accesses can only be made to Normal memory

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